GE Fanuc IC695ALG626 HART Module | New & Original Stock
GE Fanuc IC695ALG626 HART Module | New & Original Stock
GE Fanuc IC695ALG626 HART Module | New & Original Stock
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GE Fanuc IC695ALG626 HART Module | New & Original Stock

  • Manufacturer: GE Fanuc

  • Part Number: IC695ALG626-CA

  • Condition:New with Original Package

  • Product Type: Analog Input Modules

  • Country of Origin: USA

  • Payment:T/T, Western Union

  • Shipping port: Xiamen

  • Warranty: 12 months

GE Fanuc IC695ALG626 Analog Input Module with HART

The GE Fanuc IC695ALG626-CA, also cataloged as the IC695ALG626 Analog Input Module, operates as a dedicated hardware component for converting analog signals into digital values within PACSystems RX3i platforms.

Hardware Specifications

Parameter Specification
Model IC695ALG626-CA / IC695ALG626
Brand GE Fanuc (Emerson Automation)
Origin USA
Weight 0.28 kg (0.63 lbs)
Dimensions Standard PACSystems RX3i single-slot module dimensions
Operating Temp 0 to 60 deg C (32 to 140 deg F)
Power Consumption 4.23 W (600 mA @ 3.3 VDC, 450 mA @ 5 VDC backplane draw)
Module Type Non-isolated analog input module with HART communications
Channel Count 16 single-ended or 8 differential input channels
Voltage Input Ranges +/-10 VDC, 0-10 VDC, +/-5 VDC, 0-5 VDC, 1-5 VDC, +/-50 mV, +/-150 mV
Current Input Ranges 4-20 mA, 0-20 mA, +/-20 mA
Protocol Support HART Version 5.0
Module Resolution 24-bit Analog-to-Digital Converter (ADC)
Input Data Format IEEE 32-bit floating point or 16-bit integer in a 32-bit field
Configurable Filters 8 Hz, 12 Hz, 16 Hz, 40 Hz, 200 Hz, 500 Hz
Maximum Overvoltage +/-60 VDC continuous
Maximum Overcurrent +/-28 mA continuous
Input Resistance Voltage: >100 kOhm; Current: 249 Ohm +/-1%
Calibration Autocalibration executed automatically during power-up
Open Circuit Fault Time 1 second maximum

4-20 mA HART Loop Protocol and Channel-to-Channel Isolation

The GE Fanuc IC695ALG626 incorporates an integrated HART modem per channel to process digital telemetry superimposed onto standard 4-20 mA HART loop protocol lines. The 24-bit analog-to-digital converter transforms continuous current and voltage waveforms into formatted data registers without disrupting background digital parameter scanning. The hardware utilizes global optocouplers providing 250 VDC channel-to-PLC backplane isolation, though individual paths remain non-isolated from adjacent channels on the common field terminal. Signal processing frequencies are restricted by internal hardware filters configurable down to 8 Hz to eliminate high-frequency cross-talk and industrial line harmonics.

Frequently Asked Questions

Q: How is the onboard current loop resistance managed when configuring a channel for current inputs? A: When a channel terminal is configured for current sensing, the module switches in an internal precision 249 Ohm (+/-1%) shunt resistor. Field wiring must ensure that overcurrent conditions do not exceed the +/-28 mA continuous limit to prevent thermal breakdown of this internal sensing element.

Q: Does the module require manual software calibration routines to maintain its 24-bit resolution accuracy? A: No. The hardware executes an autocalibration sequence automatically upon every power-up cycle. Internal reference voltages are measured against the ADC thresholds to adjust zero and gain offset constants, ensuring stable signal conversion across the 0 to 60 deg C operating boundary.

Field Installation Guidelines

  • Terminal Assembly and Power Lockout: Completely isolate the RX3i Universal Backplane power supply and any connected field loops before engaging or disengaging the front terminal connector block to avoid active channel arcing.
  • Shield Grounding and Differential Routing: Route all 4-20 mA and low-voltage signal pairs using twisted, shielded instrumentation wire. Terminate the outer copper shield braid exclusively at the central enclosure earth ground bus bar to minimize stray ambient electromagnetic interference.
  • Open Circuit Fault Suppression: For any input channels left unpopulated in the final system deployment, configure the respective software registers to disabled. This action suppresses the native 1-second open circuit detection alarm and prevents false hardware alerts from populating the CPU fault table.
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