GE Fanuc IC693CPU360DH Series 90-30 Datasheet & Technical Manual
GE Fanuc IC693CPU360DH Series 90-30 Datasheet & Technical Manual
GE Fanuc IC693CPU360DH Series 90-30 Datasheet & Technical Manual
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GE Fanuc IC693CPU360DH Series 90-30 Datasheet & Technical Manual

  • Manufacturer: GE Fanuc

  • Part Number: IC693CPU360DH

  • Condition:New with Original Package

  • Product Type: CPU Processors

  • Country of Origin: USA

  • Payment:T/T, Western Union

  • Shipping port: Xiamen

  • Warranty: 12 months

GE Fanuc IC693CPU360DH Series 90-30 PLC

The GE Fanuc IC693CPU360DH, also cataloged as the GE Fanuc IC693CPU360 CPU Module, serves as the primary GE Fanuc IC693CPU360 CPU Module utilized to execute high-performance logic calculations across Series 90-30 PLC platforms.

Hardware Specifications

Parameter Specification
Model IC693CPU360DH
Brand GE Fanuc
Origin USA
Weight 0.45 kg module baseline / 0.9 kg complete assembly
Dimensions 160 mm x 100 mm x 45 mm
Operating Temp 0 to +60 deg C
Power Consumption Backplane logic bus current draw dependent
Processor Type Intel 386EX, 32-bit architecture
Processor Speed 25 MHz
User Program Memory 240 KB (RAM)
Register Memory Up to 9,999 words (32K words configurable data memory)
Boolean Execution Speed 0.22 ms to 0.6 ms per 1K logic instructions
Discrete I/O Capacity 2048 DI / 2048 DO (Up to 4,096 points total)
Analog Capacity 1024 AI / 256 AO (Up to 1,024 channels total)
Communication Ports 1 x RS-232 serial port, 1 x RS-485 serial port (SNP / SNPX)
Enclosure Baseplate Compatibility 5-slot or larger 90-30 rack
Program Retention Battery-backed RAM or optional EEPROM / flash memory
Storage Temperature -20 to +70 deg C
Relative Humidity 5% to 95% non-condensing
Certifications UL, CE, CSA approved

Industrial Control and Drives Bus Management

The 32-bit controller architectural core implements a 25 MHz processing loop to regulate backplane bus communication velocity Licences across the rack assembly. This processing speed maintains deterministic I/O density scaling transitions across up to 4,096 discrete points while executing Boolean sweeps between 0.22 ms and 0.6 ms per 1K of logic instructions. The physical link subsystem routes data payloads concurrently across internal serial SNP/SNPX pathways and peripheral networking structures, utilizing firmware flash compatibility constraints to isolate host processing registers from transient field communication faults.

Frequently Asked Questions

Q: What are the backplane current constraints when deploying the IC693CPU360DH module in older Series 90-30 racks?

A: The 32-bit CPU module draws its native logic power directly from the 5 VDC rack bus rail. Engineers must confirm that the power supply module mounted on the baseplate has adequate residual current margin to accommodate the processor along with any adjacent high-density I/O modules.

Q: How is logic memory retention managed during a total input power disruption?

A: Volatile user memory retention relies on a standard rack-mounted lithium battery assembly backup. Alternatively, configurations can be compiled and burned into non-volatile EEPROM or flash memory modules to allow direct system boot-up execution following long-term shutdown periods.

Field Installation Guidelines

  • Chassis Slot Placement: Insert the CPU module into the dedicated left-hand slot position of a 5-slot or larger Series 90-30 baseplate assembly. Ensure the rear multi-pin pin-and-socket connectors seat squarely into the backplane before engaging the plastic mechanical clips.
  • Serial Cable Shield Grounding: Route all RS-485 and RS-232 communication lines inside grounded metal wire ways located away from high-voltage motor starters, switching relays, or variable frequency drive cables to maximize cross-talk suppression.
  • Thermal Boundary Clearance Constraints: Maintain proper ventilation clearances above and below the rack chassis. Ensure that internal cabinet air temperatures surrounding the module remain between 0 and +60 deg C to protect the 25 MHz 386EX micro-components from thermal stress.
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